1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device with a semiconductor substrate. More specifically, the present invention relates to a method of manufacturing a semiconductor device in which a through-hole is formed in a semiconductor substrate to thereby establish electrical conduction between a front surface and rear surface of the semiconductor substrate.
2. Related Background Art
Plural active elements are formed on a surface of a semiconductor substrate in conventional electrophotographic apparatuses, optical recording apparatuses, ink jet printer heads, and other semiconductor apparatuses that are made by a semiconductor process. These active elements are electrically connected to each other to thereby give the semiconductor apparatus various functions in compact forms. The recent downsizing of electronic equipment is accompanied by a demand for further reduction in size and increase in density of semiconductor apparatuses. A possible solution under consideration is to electrically connect the front surface and rear surface of a semiconductor substrate via a through-hole formed in the semiconductor substrate, so that the rear surface of the semiconductor substrate, in addition to the front surface, is put into use as a wiring region.
One of the methods to form a through-hole in a semiconductor substrate is laser machining. U.S. Pat. No. 6,563,079 B describes how through-hole formed by laser machining is utilized to electrically connect the front surface and rear surface of a semiconductor substrate. In U.S. Pat. No. 6,563,079 B, the first step is to form, with a laser, a through-hole in a silicon substrate that has a {100} crystal plane orientation on the front and rear surfaces. The inner size of the through-hole is then increased by wet anisotropic etching. Next, an insulating film is formed on the inner surface of the through-hole by chemical vapor deposition (CVD), physical vapor deposition (PVD), or the like. On the surface of the insulating film, a conductive film is formed by sputtering, plating, patterning, etching, or the like. A semiconductor substrate whose front surface and rear surface are electrically connected via a conductive film in the through-hole is thus manufactured.
However, the method of forming a through-hole by laser machining and then increasing its inner size by etching, as the one shown in U.S. Pat. No. 6,563,079 B, has several problems. The problems originate from the fact that the etching rate in wet anisotropic etching of a semiconductor substrate greatly varies from one crystal orientation to another.
Table 1 shows the etching rate of a silicon substrate when the substrate has {100}, {110} and {111} crystal plane orientations.
TABLE 1Silicon substrate etching rate{100}0.60{110}1.11{111}0.02Etching conditions 20% aqueous solution of TMAHTemperature: 80° C.
First, a description is given on a case in which a laser is used to form a through-hole in a silicon substrate that has a {110} crystal plane orientation on the front and rear surfaces and the hole size of the through-hole is enlarged by wet anisotropic etching. In the case of a silicon substrate that has a {110} crystal plane orientation on the front and rear surfaces, the inner size of a through-hole formed by laser machining is increased in a direction where the crystal orientation is {111}. From Table 1, it is understood that a {111} plane silicon substrate is etched at a rate far slower than a {100} silicon substrate and a {110} plane silicon substrate. In the case of a silicon substrate that has a {110} crystal plane orientation on the front and rear surfaces, the inner size of a through-hole formed by laser machining is increased in a direction where the crystal orientation is a {110} crystal plane, and the etching rate of the through-hole is very slow. Accordingly, industrially speaking, it is not preferable to use a silicon substrate that has a {110} crystal plane orientation on the front and rear surfaces in the method of forming a through-hole and then increasing its inner size by etching.
A case of using a silicon substrate that has a {100} crystal plane orientation on the front and rear surfaces is described next. FIGS. 8A and 8B show the positional relation between a {111} crystal plane, a {100} crystal plane and a {110} crystal plane in a {100} silicon substrate. FIG. 8A is a perspective view showing the positional relation between the three crystal planes in the {100} silicon substrate, and FIG. 8B is a sectional view cut along the {110} crystal plane. As can be seen in FIGS. 8A and 8B, the {100} crystal plane and the {110} crystal plane are at right angles with each other whereas the {111} crystal plane is at about 754.7° with respect to the {100} crystal plane.
FIGS. 9A and 9B are schematic diagrams showing the state of a through-hole which is formed by a laser in a silicon substrate having a {100} crystal plane orientation on the front and rear surfaces and which is enlarged in size by wet anisotropic etching. FIG. 9A is a sectional view of the semiconductor substrate and FIG. 9B is a top view of the semiconductor substrate. FIG. 9A only shows the vicinity of the through-hole on the front surface of the semiconductor substrate, but the rear surface of the semiconductor substrate is in a similar state. The dotted lines in FIG. 9A represent the through-hole after it is formed by laser machining and before its inner size is increased by etching.
In FIGS. 9A and 9B, a reference symbol 1 denotes a semiconductor substrate made of silicon, 3 denotes a protective film formed from a thermally oxidized film and having an insulating ability, and 5 denotes a through-hole. Laser machining is performed after the protective film 3 is formed on each side of the semiconductor substrate 1, and therefore the inner circle (indicated by the dotted lines) of the through-hole formed by laser machining matches the opening in the protective film 3 in shape. When the silicon substrate has a {100} crystal plane orientation on the front and rear surfaces, the inner size of the through-hole formed by laser machining is increased in a direction where the crystal orientation is {110}. This means that the through-hole is etched easily at a fast etching rate.
On the other hand, the substrate is hardly etched in a direction where the crystal orientation is {111}. The {111} crystal plane forms, as shown in FIGS. 9A and 9B, an angle of about 54.7° with the {100} crystal plane on the front and rear surfaces of the silicon substrate. An increase in inner size of the through-hole 5 by anisotropic etching therefore gives the through-hole in the vicinity of the opening an edged shape (reversely tapered shape) at an angle of about 54.7° as shown in FIGS. 9A and 9B. The reversely tapered shape is enlarged as the anisotropic etching progresses.
In the case of the through-hole 5 shown in FIGS. 9A and 9B, the hole size is larger inside the hole than at its openings on the front surface and rear surface of the semiconductor substrate 1. This makes it difficult to form on the inner surface of the through-hole a uniform insulating film or conductive film by CVD, PVD or the like. Specifically, in CVD or the like, the reversely tapered shape of the through-hole in which the inner size is small at the openings and becomes larger toward the middle of the hole hinders vapor circulation in the through-hole and thus lowers the deposition efficiency. In PVD such as sputtering, the reversely tapered shape could prevent metal atoms, which linearly travel from the entrances of the through-hole to the inside of the through-hole, from reaching the inner surface of the through-hole geometrically. The resultant insulating film or conductive film does not have a necessary thickness, and causes defective insulation or defective conduction.
Forming the conductive film by plating is also unsuccessful in giving the conductive film a necessary thickness and avoiding defective conduction since the reversely tapered shape detains a plating solution inside the through-hole 5 and prevents the plating liquid from circulating back to the outside of the through-hole, thus lowering the speed of plating the inner surface of the through-hole.
The semiconductor substrate 1 forms a semiconductor pattern after the through-hole 5 is formed. The formation of the semiconductor pattern includes application of a resist material by spin coating or the like, and therefore it is desirable to seal the interior of the through-hole 5 completely with a sealing material. A conceivable sealing measure is injection utilizing printing, a dispenser, a difference in air pressure, or the like. Here the reversely tapered openings of the through-hole 5 pose another problem. With the reversely tapered openings, filling the through-hole 5 completely with a sealing material by injection is difficult and there is a strong possibility that air bubbles are left in the interior of the through-hole 5.
As shown in FIG. 9A, the thermally oxidized film 3 formed to a thickness of about 1 μm on the semiconductor substrate 1 also has a function of an etching stopper layer. As the inner size of the through-hole 5 in the semiconductor substrate 1 is increased by etching, a hood portion 3a is formed in the thermally oxidized layer 3 as an etching stopper layer. The hood portion 3a is easily broken at a small pressure, presenting a serious problem for the reliability of the step.